发明名称 METHOD OF MANUFACTURING ELECTRONIC PART PACKAGING STRUCTURE
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a method of manufacturing an electronic part packaging structure including electronic parts embedded in an interlayer dielectric on a wiring board therein, which eliminates bumps due to thickness of the electronic parts to flatten it. <P>SOLUTION: The method includes steps of forming an uncured resin film 32a on a wiring board 24 including a wiring pattern 28a, embedding an electronic part 20a, which includes a connection terminal 21a and a passivation film 21b with an opening 21x for exposing the connection terminal on an element forming face, into the uncured resin film 32a with the connection terminal 21a being upward, treating the resin film 32a with heat for curing it to obtain an insulating film 32, boring a via hole 32x into the insulating film 32 on the wiring pattern 28a, and forming an upper side wiring pattern 28b which is connected to the wiring pattern 28a through the via hole 32x and connected to the connecting terminal 21a through the opening 21x in such a manner as straddling between the passivation film 21b and the insulating film 32. <P>COPYRIGHT: (C)2010,JPO&INPIT</p>
申请公布号 JP2010016412(A) 申请公布日期 2010.01.21
申请号 JP20090241253 申请日期 2009.10.20
申请人 SHINKO ELECTRIC IND CO LTD 发明人 HARUHARA MASAHIRO;MURAYAMA HIROSHI;HIGASHI MITSUTOSHI;KOYAMA TOSHINORI
分类号 H05K3/46 主分类号 H05K3/46
代理机构 代理人
主权项
地址