发明名称 |
MULTIPLEXING OF INPUTS AND DELAYED INPUTS OF A CIRCUIT EMULATION |
摘要 |
Various techniques related to clocking for use with automated circuit design and simulations are disclosed. In some embodiments, a method includes receiving descriptions of design circuitry including logic to receive input signals. The method further includes generating additional descriptions through at least one computer program including descriptions of a multiplexer to multiplex the input signals and delayed input signals, and provide them to the logic, and a demultiplexer to demultiplex output signals and delayed output signals from the logic. Other embodiments are described. |
申请公布号 |
EP2145272(A1) |
申请公布日期 |
2010.01.20 |
申请号 |
EP20080754338 |
申请日期 |
2008.05.09 |
申请人 |
SYNOPSYS, INC. |
发明人 |
LAROUCHE, MARIO;MAIXNER, RICHARD;NG, CHUN KIT;MCELVAIN, KENNETH |
分类号 |
G06F17/50 |
主分类号 |
G06F17/50 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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