发明名称 |
A/D converter |
摘要 |
<p>An A-to-D converter comprising a plurality of successive approximation type A-to-D converters, each of which includes a cyclic D-to-A converter, a comparator for comparing the analog value with an output value of the D-to-A converter and memory means for sequentially storing an output value of the comparator and supplying the stored value to the D-to-A converter in a reverse order; a plurality of sample and hold circuits for supplying an analog value to each of the plurality of successive approximation type A-to-D converters; and a multiplexer for sequentially supplying an input analog signal to the plurality of sample and hold circuits. Flip-flops included in the respective memory means of the plurality of successive approximation type A-to-D converters for storing an output value of the respective comparator are connected together to form a shift register.</p> |
申请公布号 |
EP2146435(A2) |
申请公布日期 |
2010.01.20 |
申请号 |
EP20090173127 |
申请日期 |
2007.11.30 |
申请人 |
PANASONIC CORPORATION |
发明人 |
DOSHO, SHIRO;MORIE, TAKASHI;MATSUKAWA, KAZUO |
分类号 |
H03M1/12;H03M1/46;H03M1/66 |
主分类号 |
H03M1/12 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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