发明名称 RESIDUE FREE PATTERNED LAYER FORMATION METHOD APPLICABLE TO CMOS STRUCTURES
摘要 <p>A method for forming a microelectronic structure uses a mask layer located over a target layer. The target layer may be etched while using the mask layer as an etch mask to form an end tapered target layer from the target layer. An additional target layer may be formed over the end tapered target layer and masked with an additional mask layer. The additional target layer may be etched to form a patterned additional target layer separated from the end tapered target layer and absent an additional target layer residue adjacent the end tapered target layer. The method is useful for fabricating CMOS structures including nFET and pFET gate electrodes comprising different nFET and pFET gate electrode materials.</p>
申请公布号 EP2145349(A1) 申请公布日期 2010.01.20
申请号 EP20080754077 申请日期 2008.04.08
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 CHUDZIK, MICHAEL, P.;DORIS, BRUCE, B.;HENSON, WILLIAM, K.;YAN, HONGWEN;ZHANG, YING
分类号 H01L21/20;H01L21/28;H01L21/311;H01L21/3213;H01L21/8238;H01L21/84;H01L29/04 主分类号 H01L21/20
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