| 摘要 |
FIELD: physics; computer engineering. ^ SUBSTANCE: invention relates to computer engineering and can be used in designing discrete information processing systems. This outcome is achieved due to provision of equiprobable servicing of operational units through a mechanism for cyclic change of priorities. The parallel information processing device has a ring bus for transmitting instruction packets, local data memory units, local data-ready memory, local instruction memory, local logic-in memory, which form local instruction packet memory, operational units, engagement triggers, data packet bus, data input and output units, data stack memory unit, a bus for transmitting result packets, results local stack memory units, priority circuit with cyclic change of priorities, comparator circuits, input locking devices, each formed by an address register and a data register, gate units, address bus. ^ EFFECT: increased efficiency of the device. ^ 2 cl, 2 dwg |
