| 摘要 |
A semiconductor device, in which a test element group (TEG) including check patterns is formed together with a chip on a wafer so as to measure electric characteristics thereof, includes an interface circuit for selecting the check pattern from the test element group, a protection resistor connected in series with the test element group so as to protect the test element group, and a dummy element connected in series with the test element group. It allows the TEG test, which can be performed after packaging, to be easily performed at a high precision irrespective of dispersions of parasitic resistances and protection resistors. The test result is corrected based on the calculated values of the parasitic resistance and protection resistor and is then stored in a specific table form, wherein a pass/fail decision is made as to whether or not the test result falls within the prescribed range.
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