发明名称 BIDIRECTIONAL BUS CONTROL CIRCUIT
摘要 PROBLEM TO BE SOLVED: To prevent malfunction by recognizing an invalid period of data confirmation when switching the direction of a bidirectional bus. SOLUTION: The bidirectional bus control circuit 2, in which first and second direction signals for instructing the directions of the bus are input, and a clock signal and a data signal are input/output, includes: a first bidirectional buffer 23 which switches an input or output direction of the clock signal according to a signal direction to be instructed by the second direction signal; a second bidirectional buffer 24 which switches an input or output direction of the data signal according to the signal direction to be instructed by the second direction signal; and a data confirmation part 46 which confirms the data signal input in the second bidirectional buffer to invalidate confirmation of the data signal according to switching of the signal direction from an input direction to an output direction to be instructed by the second direction signal. COPYRIGHT: (C)2010,JPO&INPIT
申请公布号 JP2010011041(A) 申请公布日期 2010.01.14
申请号 JP20080167528 申请日期 2008.06.26
申请人 FUJITSU LTD 发明人 TAKEHARA MASARU
分类号 H03K19/0175;G06F3/00 主分类号 H03K19/0175
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