SEMICONDUCTOR DEVICE AND ARRANGEMENT METHOD THEREFOR

摘要

Provided is an arrangement method for a semiconductor device which comprises plural external connecting terminals and plural inductors, the external connecting terminals being disposed at a predetermined pitch in a lattice pattern.  The arrangement method for the semiconductor device is characterized by comprising a first step of determining the arrangement of the external connecting terminals, a second step of determining the maximum width of air-core portions of the inductors, a third step of drawing first virtual lines each of which passes a nearly intermediate position between the external connecting terminals adjacent to each other in a first direction, a fourth step of drawing second virtual lines each of which passes a nearly intermediate position between the external connecting terminals adjacent to each other in a second direction nearly orthogonal to the first direction, a fifth step of determining the allowable range of distances between the first virtual line and second virtual line closest to each of the inductors and the center of each of the inductors, and a sixth step of arranging the inductors such that at least either the distance between the first virtual line closest to each of the inductors and the center of each of the inductors or the distance between the second virtual line closest to each of the inductors and the center of each of the inductors falls within the allowable range.