<p>A memory system is disclosed that includes a set of non-volatile storage elements. A given memory cell has a dielectric cap above the floating gate. In one embodiment, the dielectric cap resides between the floating gate and a conformal IPD layer. The dielectric cap reduces the leakage current between the floating gate and a control gate. The dielectric cap achieves this reduction by reducing the strength of the electric field at the top of the floating gate, which is where the electric field would be strongest without the dielectric cap for a floating gate having a narrow stem.</p>
申请公布号
WO2010005878(A1)
申请公布日期
2010.01.14
申请号
WO2009US49620
申请日期
2009.07.02
申请人
SANDISK CORPORATION;LEE, DANA;CHIN, HENRY;KAI, JAMES;ORIMOTO, TAKASHI, WHITNEY;PURAYATH, VINOD, R.;MATAMIS, GEORGE
发明人
LEE, DANA;CHIN, HENRY;KAI, JAMES;ORIMOTO, TAKASHI, WHITNEY;PURAYATH, VINOD, R.;MATAMIS, GEORGE