发明名称 Interface circuit
摘要 <p>An interface circuit (100) includes a first (INN) and a second (INP) input terminal, a first output transistor (Q121), a second output transistor (Q122), a first output controller (107) for implementing control according to a voltage supplied to the first and the second input terminal so that a predetermined current appears at a control terminal of the first output transistor if the first output transistor is in saturated state and supplies a predetermined current to the control terminal of the first output transistor if the first output transistor is in shutoff state, and a second output controller (108) for implementing control according to a voltage supplied to the first and the second input terminal so that a predetermined current appears at a control terminal of the second output transistor if the second output transistor is in saturated state and supplies a predetermined current to the control terminal of the second output transistor if the second output transistor is in shutoff state. </p>
申请公布号 EP1693963(A3) 申请公布日期 2010.01.13
申请号 EP20060001947 申请日期 2006.01.31
申请人 NEC ELECTRONICS CORPORATION 发明人 WANG, JIANQIN
分类号 H03K19/018;H03F3/30;H03F3/45 主分类号 H03K19/018
代理机构 代理人
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