发明名称 Hardware error control method in an instruction control apparatus having an instruction processing suspension unit
摘要 <p>In the instruction control apparatus having an instruction processing suspension unit (100) andanerror detection unit (200), in order to improve the reliability of the apparatus, the apparatus is configured in such a way that when an error occurs to certain hardware resources in the instruction processing apparatus, error detection is conducted if instructionprocessing is under way, but error detection is deterred if instruction processing is in suspension, and the scope of the error which cannot be deterred during the suspension of instruction processing is made narrower than the scope of the error which cannot be deterred during instruction processing. </p>
申请公布号 EP1662396(A3) 申请公布日期 2010.01.13
申请号 EP20050251346 申请日期 2005.03.07
申请人 FUJITSU LIMITED 发明人 GOMYO, NORIHITO
分类号 G06F11/07 主分类号 G06F11/07
代理机构 代理人
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