发明名称 CAPACITOR CELL, INTEGRATED CIRCUIT, INTEGRATED CIRCUIT DESIGNING METHOD, AND INTEGRATED CIRCUIT MANUFACTURING METHOD
摘要 A capacitor cell has a gate poly (6) for storing capacitance extending to the position where the power supply line is provided in a cell frame (2) and to the position where the ground line is provided. The gate poly (6) can be extended not only to both the power supply line position and the ground line position in the cell frame (2) but also to either of them. With this, the area (XxY) of the superposition region where the diffusion layer (3) and the gate poly (6) relating mainly to the amount of charge of the capacitor of the capacitor cell is increased.
申请公布号 KR20100004953(A) 申请公布日期 2010.01.13
申请号 KR20097016621 申请日期 2007.03.29
申请人 FUJITSU LIMITED 发明人 KANARI KATSUNAO
分类号 H01L21/82;H01L27/04 主分类号 H01L21/82
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