| 摘要 |
A sense amplifier section comprises two stages of latch-type sense amplifier circuits, i.e., a primary-stage latch-type sense amplifier and a secondary-stage latch-type sense amplifier, wherein stress exerted on the primary-stage latch-type sense amplifier is reduced significantly to ensure high accuracy in amplification. In the above configuration including the secondary-stage latch-type sense amplifier, when an amplified output from the primary-stage latch-type sense amplifier reaches a predetermined voltage level (e.g., 50 mV), a transition to amplifying operation of the secondary-stage latch-type sense amplifier is enabled so that a time duration of operation of the primary-stage latch-type sense amplifier (corresponding to a time duration of stress exertion on the primary-stage latch-type sense amplifier) can be shortened significantly. Further, by providing a clamp circuit in the primary-stage latch-type sense amplifier, it is possible to decrease a stress voltage itself to be applied to the primary-stage latch-type sense amplifier.
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