| 摘要 |
PURPOSE: A method for manufacturing a semiconductor package is provided to reduce a manufacturing cost of the semiconductor package by forming a via pattern for electrical connection with a printing method and a plating process instead of a bump. CONSTITUTION: An insulation layer(110) is attached on a semiconductor chip with a plurality of bonding pads(102). The insulation layer includes via holes exposing the bonding pad. A via pattern is formed in the exposed via holes. The semiconductor chip with the via patterns is attached on the upper side of the substrate with a plurality of connection pads to be connected to the connection pad corresponding to the via pattern. |
