发明名称 Memory control circuit and integrated circuit
摘要 The memory unit is compatible with a plurality of operation modes. The plurality of operation modes include the normal mode allowing access and the standby mode consuming a lower power than the normal mode. The branch detection section detects a branch instruction from an instruction fetched from the memory unit by the CPU. The mode control section changes an operation mode of the memory unit according to a detection result by the branch detection section.
申请公布号 US2010005251(A1) 申请公布日期 2010.01.07
申请号 US20080318211 申请日期 2008.12.23
申请人 NEC ELECTRONICS CORPORATION 发明人 YAMAZOE KIMINARI
分类号 G06F12/00;G06F9/312 主分类号 G06F12/00
代理机构 代理人
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