发明名称 CACHE MEMORY SYSTEM, CPU CORE, AND CACHE MEMORY CONTROL METHOD
摘要 <P>PROBLEM TO BE SOLVED: To provide a cache memory system capable of reducing the overhead of memory access, improving the utilization efficiency of a memory, a CPU, an external device for supplying data to the memory and the like, and improving the performance of the entire system, and to provide a CPU core, and a cache memory control method. Ž<P>SOLUTION: A higher-order memory data storage 24 reads updated data from a lower-order memory hierarchy 12 when data referred to by the CPU core 11 are the updated data, and stores the data in a higher-order memory hierarchy 15. When the higher-order memory storage section 24 stores data in the higher-order memory hierarchy 15, a memory lock device 23 locks the higher-order memory hierarchy 15. Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž
申请公布号 JP2010003137(A) 申请公布日期 2010.01.07
申请号 JP20080161802 申请日期 2008.06.20
申请人 FUJITSU LTD 发明人 HAYAKAWA FUMIHIKO
分类号 G06F12/08 主分类号 G06F12/08
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