发明名称 INTERFACE CIRCUIT
摘要 <P>PROBLEM TO BE SOLVED: To reduce the number of pins of an FPGA that is used for input and output of a communication signal, in an interface circuit which communicates with a plurality of external devices via a transmission path, using the FPGA. Ž<P>SOLUTION: When an indication signal indicating one of devices to be controlled 2A to 2N as a destination device of communication is input, the FPGA43 supplies a switch control signal to a switching unit 30 via a pin 432, wiring 47, connector 41 and cable 33, and connects a cable 32A with a cable 31. Also, when the indication signal is input, a switching section 45 selects a resistance corresponding to the destination device among resistances 44A<SB>1</SB>, 44A<SB>2</SB>-44N<SB>1</SB>, 44N<SB>2</SB>, and connects the resistance to the FPGA43. Then, the FPGA43 recognizes the resistance value of the resistance connected via the switching section 45, and performs impedance matching of the inter-device transmission path between the FPGA43 and the destination device by using the resistance value. Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž
申请公布号 JP2010003229(A) 申请公布日期 2010.01.07
申请号 JP20080163432 申请日期 2008.06.23
申请人 TOSHIBA CORP 发明人 SHIBATA TAKAHIRO
分类号 G06F3/00 主分类号 G06F3/00
代理机构 代理人
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