发明名称 INTEGRATED CIRCUIT PACKAGE WITH MOLDED INSULATION
摘要 A variety of improved arrangements and processes for packaging integrated circuits are described. More particularly, methods of encapsulating dice in lead frame based IC packages are described that facilitate covering some portions of the bottom surface of the lead frame while leaving other portions of the bottom surface of the lead frame exposed. In some embodiments, a method of encapsulating integrated circuits mounted on a lead frame panel is described. The lead frame panel includes a plurality of leads having associated contacts and supports. A shim having a plurality of cavities is positioned under the lead frame such that the cavities are adjacent to the supports and not adjacent to the contacts. During the encapsulation process, encapsulant material flows under the supports such that the bottom surfaces of the supports are electrically insulated by the encapsulant while the bottom surfaces of the contacts remain exposed.
申请公布号 US2010001383(A1) 申请公布日期 2010.01.07
申请号 US20090558431 申请日期 2009.09.11
申请人 NATIONAL SEMICONDUCTOR CORPORATION 发明人 BAYAN JAIME
分类号 H01L23/495;B32B3/10 主分类号 H01L23/495
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