CIRCUIT AND METHOD FOR GENERATING CLOCK

摘要

PURPOSE: A circuit and method for generating clock is provided to generate the multi-phase CLK based on the pulse signal arranged with the edge of clock and to improve the definiteness of the clock phase differential. CONSTITUTION: The pulse generating part(201) has the same period based on the reference clock. The pulse signal of the multiple having the fixed phase difference between the adjacent pulse signals is generated. The multiple phase clock generator(203) is created the multi-phase CLK based on a plurality of pulse signals. The phase difference between the adjacent clocks of the multi-phase CLK is the phase difference between the pulse signal pairs.