发明名称 DATA OUTPUT CONTROLLING CIRCUIT
摘要 PURPOSE: A data output controlling circuit is provided to stop the operation of data output mux by outputting the driving signal regardless of the input-output mode signal and address level signal to the low level. CONSTITUTION: The driving signal generator(4) generates the driving signal of data output mux in response to the input-output mode signal and address level signal. According to the driving signal, data output mux outputs the mux signal in response to data signal of the global input output line. The driving signal generator comprises the input-output mode setting part(41) is the driving signal output(42). The input-output mode setting part establishes the level of the second node and the first node in response to the input-output mode signal. The driving signal output outputs the driving signal in response to the address level signal, the first node and level signal of the second Node.
申请公布号 KR20100001831(A) 申请公布日期 2010.01.06
申请号 KR20080061908 申请日期 2008.06.27
申请人 HYNIX SEMICONDUCTOR INC. 发明人 LEE, JOO HYEON;LEE, YIN JAE
分类号 G11C7/10;G11C8/06;G11C8/10 主分类号 G11C7/10
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