发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT AND NONVOLATILE MEMORY ELEMENT
摘要 <p>An information retention capability based on a memory cell which comprises a pair of nonvolatile memory elements in a differential form is improved. A nonvolatile memory element (130) constituting a flash memory is so constructed that its tunnel oxide film (GO3) and floating gate electrode (FGT) are respectively formed by utilizing the gate oxide film (GT2) and gate electrode (GT2) of a transistor for a circuit which is formed on the same semiconductor substrate as that of the element (130). A memory cell is constructed in a 2-cells/1-bit scheme in which a pair of nonvolatile memory elements can be respectively connected to a pair of complementary data lines, and threshold voltage states different from each other are set for the nonvolatile memory elements so as to differentially read out data. A word line voltage in a readout mode is set to be substantially equal to a threshold voltage in a thermal equilibrium state (an initial threshold voltage), and also to be substantially equal to the average value of a low threshold voltage value and a high threshold voltage value. Thus, a data retention capability is enhanced to realize lowering in the rate of readout faults. <IMAGE></p>
申请公布号 EP1150302(B1) 申请公布日期 2010.01.06
申请号 EP20000900823 申请日期 2000.01.19
申请人 RENESAS TECHNOLOGY CORP. 发明人 SYUKURI, SYOJI;KOMORI, KAZUHIRO;OKUYAMA, KOUSUKE;KUBOTA, KATSUHIKO
分类号 G11C16/06;G11C11/34;G11C16/04;G11C16/10;G11C16/28;H01L21/8247;H01L27/105 主分类号 G11C16/06
代理机构 代理人
主权项
地址