| 摘要 |
The present invention provides an equalizer processing module within a wireless terminal having an equalizer interface that receives an incoming baseband signal from a baseband processor operably coupled to the equalizer processing module and outputs soft decisions. A processor or advanced reduced instruction set computer (RISC) machine (ARM) couples to the equalizer interface while an equalizer accelerator module operably couples to the processor or ARM. Processing of the incoming baseband signal to produce soft decisions is performed by the combination of the processor and equalizer accelerator module. A sample capture buffer and an equalizer output buffer which may or may not be within the equalizer processing module allow data to be sampled and serves as the input and output for the equalizer processing module. This equalizer accelerator may specifically perform compute intensive operations such as Trellis computations for MAP equalization or MLSE equalization.
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