发明名称 Reference voltage generating circuit and semiconductor integrated circuit device
摘要 A reference voltage generating circuit comprises: a monitor circuit, including a low threshold voltage PMOS transistor, a low threshold voltage NMOS transistor, and a resistor having a predetermined resistance which are connected in series, for generating a reference voltage at one end; and an additional circuit for supplying a monitor current to the monitor circuit and for controlling the other end of the monitor circuit to be at a constant voltage, wherein a voltage value of the reference voltage is corrected within a range corresponding to a process fluctuation from a predetermined center value, based on the monitor current changing in response to the process fluctuation.
申请公布号 US7642843(B2) 申请公布日期 2010.01.05
申请号 US20080018375 申请日期 2008.01.23
申请人 ELPIDA MEMORY INC. 发明人 RIHO YOSHIRO
分类号 G05F1/10 主分类号 G05F1/10
代理机构 代理人
主权项
地址