发明名称 Identification Circuit with Repeatable Output Code
摘要 A comparator receives a first read of voltage differentials from a series of bit cells, compares the first read to a positive voltage offset of a given magnitude, and set bits in a first bit stream to values that are dependent upon whether the voltage differential from a given bit cell is greater than the positive voltage offset. The first bit stream is then stored in a first register. The comparator also receives a second read of the voltage differentials from the series of bit cells, compares the second read to a negative voltage offset of the given magnitude, and sets bits in a second bit stream to values that are dependent upon whether the voltage differential from a given bit cell is greater than the positive voltage offset. The second bit stream is stored in a second register. The comparator then compares the first bit stream to the second bit stream, and set bits in a mask string dependent upon whether the bits in a given position of the first bit stream and the second bit stream are identical. A third register receives the mask string. The comparator additionally receives a subsequent read of the voltage differentials from the series of bit cells, compares the subsequent read to a zero voltage offset, and set bits in a subsequent bit stream to values that are dependent upon whether the voltage differential from a given bit cell is greater than the zero voltage offset. The subsequent bit stream is compared to the mask string, and bits of the subsequent bit stream that are disposed in positions set in the mask string are corrected.
申请公布号 US2009323870(A1) 申请公布日期 2009.12.31
申请号 US20060466876 申请日期 2006.08.24
申请人 LSI LOGIC CORPORATION 发明人 BITTING RICKY F.;MCGRATH DONALD T.;VOGEL DANNY C.
分类号 H03D1/04 主分类号 H03D1/04
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