发明名称 MEMORY OPERATION TESTING
摘要 Test circuitry for determining whether a memory can operate at a lower operating voltage. The test circuitry includes a sense circuit having a delayed sensing characteristic as compared to other sense amplifier circuits of the memory. With this circuitry the test circuitry can determine if the sense circuit can provide valid data under more severe sensing conditions. In one example, the sense circuit includes a delay circuit in the sense enable signal path. If sense circuit can provide data at more server operating conditions, then the memory operating voltage can be lowered.
申请公布号 US2009323446(A1) 申请公布日期 2009.12.31
申请号 US20080164755 申请日期 2008.06.30
申请人 ZHANG SHAYAN;HIGMAN JACK M;SNYDER MICHAEL D 发明人 ZHANG SHAYAN;HIGMAN JACK M.;SNYDER MICHAEL D.
分类号 G11C29/00 主分类号 G11C29/00
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