发明名称 SELECTIVE FORMATION OF DIELECTRIC ETCH STOP LAYERS
摘要 Methods to selectively form a dielectric etch stop layer over a patterned metal feature. Embodiments include a transistor incorporating such an etch stop layer over a gate electrode. In accordance with certain embodiments of the present invention, a metal is selectively formed on the surface of the gate electrode which is then converted to a silicide or germanicide. In other embodiments, the metal selectively formed on the gate electrode surface enables a catalytic growth of a silicon or germanium mesa over the gate electrode. At least a portion of the silicide, germanicide, silicon mesa or germanium mesa is then oxidized, nitridized, or carbonized to form a dielectric etch stop layer over the gate electrode only.
申请公布号 US2009321795(A1) 申请公布日期 2009.12.31
申请号 US20080165515 申请日期 2008.06.30
申请人 KING SEAN;KLAUS JASON 发明人 KING SEAN;KLAUS JASON
分类号 H01L21/28;H01L29/423 主分类号 H01L21/28
代理机构 代理人
主权项
地址