| 摘要 |
PURPOSE: A gate driver for a liquid crystal display device is provided to reduce power consumption by driving only enable register selected when driving a partial mode of a liquid crystal display device. CONSTITUTION: A shift register is subordinately connected and outputs an output signal successively. One of a first clock signal and a first clock bar signal is inputted to the shift register. A plurality of enable registers are connected to the plurality of shift registers one-to-one and output the output signal according to the enable signal input. One of a second clock signal and a second clock bar signal is inputted to the plurality of enable registers. A partial controller(20) outputs the enable signal and select the enable register into which the enable signal, the second clock signal, and the second clock bar signal are inputted.
|
