发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT AND I/O DRIVE CAPACITY ADJUSTMENT METHOD
摘要 <p>The drive capacity of a semiconductor integrated circuit is adjusted without relying on the inspection during mass production shipping. A semiconductor integrated circuit (21) includes an output buffer and an input buffer, and comprises a plurality of I/O cells (37,38,39,40,41) which exchange data with external devices, a test mode setting circuit (34) which connects the plurality of I/O cells in the chain state through logic elements during the test mode, and a delay measurement circuit (27) which measures the total delay of the plurality of I/O cells connected in a chain during the test mode.</p>
申请公布号 WO2009157134(A1) 申请公布日期 2009.12.30
申请号 WO2009JP02373 申请日期 2009.05.28
申请人 PANASONIC CORPORATION;ABE, SHINICHI 发明人 ABE, SHINICHI
分类号 H03K19/00;G01R31/28;G01R31/3185 主分类号 H03K19/00
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