发明名称 |
Ultra low area overhead retention flip-flop for power-down applications |
摘要 |
In a method and system for data retention, a data input is latched by a first latch. A second latch coupled to the first latch receives the data input for retention while the first latch is inoperative in a standby power mode. The first latch receives power from a first power line that is switched off during the standby power mode. The second latch receives power from a second power line. A controller receives a clock input and a retention signal and provides a clock output to the first latch and the second latch. A change in the retention signal is indicative of a transition to the standby power mode. The controller continues to hold the clock output at a predefined voltage level and the second latch continues to receive power from the second power line in the standby power mode, thereby retaining the data input.
|
申请公布号 |
US7639056(B2) |
申请公布日期 |
2009.12.29 |
申请号 |
US20050138788 |
申请日期 |
2005.05.26 |
申请人 |
TEXAS INSTRUMENTS INCORPORATED |
发明人 |
GURURAJARAO SUMANTH KATTE;MAIR HUGH T.;SCOTT DAVID B.;KO UMING |
分类号 |
H03K3/289;H03K3/356 |
主分类号 |
H03K3/289 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|