发明名称 Integrated circuit incorporating decoupling capacitor under power and ground lines
摘要 A semiconductor device is composed of: an array of CMOS primitive cells provided in a circuit region; a power supply line extended along the array of the CMOS primitive cells and connected to the CMOS primitive cells; a ground line extended along the array of the CMOS primitive cells and connected to the CMOS primitive cells; a first decoupling capacitor provided under the power supply line; a second decoupling capacitor provided under the ground line. The first decoupling capacitor is formed of a PMOS transistor having a gate connected to the ground line. At least one of the source and drain of the PMOS transistor is connected to the power supply line. The second decoupling capacitor is formed of an NMOS transistor having a gate connected to the power supply line. At least one of the source and drain of the NMOS transistor is connected to the ground line.
申请公布号 US7638821(B2) 申请公布日期 2009.12.29
申请号 US20060510648 申请日期 2006.08.28
申请人 NEC ELECTRONICS CORPORATION 发明人 AOKI YASUSHI
分类号 H01L29/12 主分类号 H01L29/12
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