发明名称 Stepping motor control circuit and analog electronic timepiece
摘要 The present invention aims to prevent a nonrotation state from being brought about even when a drive allowance is changed by variations in a stepping motor or the like. A pulse down counter circuit outputs pulse down control signal for subjecting main drive pulse to control pulse down when time is counted for a predetermined time period. When a detecting signal exceeding a reference threshold voltage detected by a rotation detecting circuit is detected at a first detection section at start of a rotation detecting time period, a control circuit resets the pulse down counter circuit. Thereby, a main drive pulse generating circuit is not subjected to control pulse down by the pulse down counter circuit, and therefore, it is prevented that the main drive pulse is subjected to pulse down unnecessarily.
申请公布号 US2009316535(A1) 申请公布日期 2009.12.24
申请号 US20090456332 申请日期 2009.06.15
申请人 OGASAWARA KENJI;MASAKI HIROYUKI;TAKAKURA AKIRA;MANAKA SABURO;HONMURA KEISHI;SAKUMOTO KAZUMI;KATO KAZUO;HASEGAWA TAKANORI;YAMAMOTO KOSUKE 发明人 OGASAWARA KENJI;MASAKI HIROYUKI;TAKAKURA AKIRA;MANAKA SABURO;HONMURA KEISHI;SAKUMOTO KAZUMI;KATO KAZUO;HASEGAWA TAKANORI;YAMAMOTO KOSUKE
分类号 G04B19/04;H02P8/38 主分类号 G04B19/04
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