发明名称 Power state-aware thread scheduling mechanism
摘要 A system filter is maintained to track which single-thread cores [or which multi-threaded logical CPUs] are in a low-latency power state. For at least one embodiment, low-latency power states include an active C0 state and a low-latency C1 idle state. The system filter is used to filter out any cores/thread contexts in a high-latency state during task scheduling. This may be accomplished by filtering the OS-provided task affinity mask by the system filter. As a result, tasks are scheduled only on available cores/logical CPUs that are in an active or low-latency idle state. Other embodiments are described and claimed.
申请公布号 US2009320031(A1) 申请公布日期 2009.12.24
申请号 US20080214523 申请日期 2008.06.19
申请人 SONG JUSTIN J 发明人 SONG JUSTIN J.
分类号 G06F9/46 主分类号 G06F9/46
代理机构 代理人
主权项
地址