发明名称 SEMICONDUCTOR DEVICE WITH DIGITAL INTERFACE
摘要 <P>PROBLEM TO BE SOLVED: To provide an LSI, for reducing jitter depending on a data pattern by using a receiver of an interface, which is capable of automatically adjusting setting of a delay amount for reduction. <P>SOLUTION: In a semiconductor device, since a previous state of data pattern dependent jitter is predictable, a state of data received by a receiver is held and timing to capture input data is adjusted from the held state and from input data. As an adjustment mechanism inside the receiver for determining a delay amount depending on a mounting form, pulse data at intervals of one cycle and pulse data at intervals of two cycles are transmitted/received from a driver as a test pattern. An automatic adjustment mechanism for determining a delay amount optimal for a system from a rising and falling time difference of pulses having different pulse widths, is provided. <P>COPYRIGHT: (C)2010,JPO&INPIT
申请公布号 JP2009303245(A) 申请公布日期 2009.12.24
申请号 JP20090216805 申请日期 2009.09.18
申请人 HITACHI LTD;ELPIDA MEMORY INC;HITACHI ULSI SYSTEMS CO LTD 发明人 OSAKA HIDEKI;NISHIO YOJI;SENBA SEIJI;SHOJI KAZUYOSHI
分类号 H04L7/02;G06F3/00;H03K5/00;H03K5/135;H04L25/03 主分类号 H04L7/02
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