摘要 |
PURPOSE:To make accurate corrections of the time axis of a reproduced output signal by generating an address clear pulse by counting a horizontal synchronizing signal or multiplied signal included in a vertical synchronizing period right before. CONSTITUTION:The output signal of control oscillator 38 is counted down by counter 44 to obtain address clear pulse 46 in a vertical synchronizing period. This counter 44 is reset by reset pulse 45, i.e., a vertical synchronizing pulse separated from an input video signal. This counter 44 is capable of storing the number of lines included in the period of two reset pulses 45, so that even in case of absence of reset pulse 45, the number of lines included in one vertical synchronizing period right before the absence will be counted and outputted 46. An address can therefore be cleard accurately. |