发明名称 |
D-CLASS DIGITAL AMPLIFIER CONFIGURED FOR SHAPING NON-IDEALITIES OF AN OUTPUT SIGNAL |
摘要 |
The invention relates to an amplifier (A2) including a digital delta-sigma modulator (2), a quantifier (QT1) receiving a signal (NSS) provided by a delta-sigma stage (DS5) and providing a quantified signal (QS), and a power circuit (PA) providing an output signal (OS). The device includes N state loops of a first type configured for sending the output signal (OS) back to adders of N lower-rank delta-sigma stages, each state loop of the first type including an analog low-pass filter (LPF1) for providing a filtered output signal (FOS), and an analog-to-digital converter (ADC) for providing a digitised filtered output signal (DFOS). |
申请公布号 |
WO2009153449(A2) |
申请公布日期 |
2009.12.23 |
申请号 |
WO2009FR00715 |
申请日期 |
2009.06.16 |
申请人 |
UNIVERSITE AIX-MARSEILLE I;CENTRE NATIONAL DE LA RECHERCHE SCENTIFIQUE;PRIMACHIP SAS;IHS, HASSAN;DUFAZA, CHRISTIAN |
发明人 |
IHS, HASSAN;DUFAZA, CHRISTIAN |
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