| 摘要 |
PROBLEM TO BE SOLVED: To achieve a high speed operation by using an incorporated terminal resistance even when the number of ranks is larger than the number of terminal resistance control (ODT) terminals installed in a memory module concerning a multi-rank memory module loaded with a synchronous memory chip in a multi-rank, which is equipped with the terminal resistance of a data input/output pad 13 and a terminal resistance control pad 14 for inputting a signal to control the on/off of the terminal resistance. SOLUTION: A terminal resistance control pad 14 of a memory chip 12 in which the length of wiring of a data bus 19 and a data input/output pad 13 on a module substrate 8 is long is connected to a terminal resistance control interconnect 18 or 21, and the on/off of the terminal resistance is controlled from the ODT terminal, and a terminal resistance control pad of a memory chip 11, having a shorter length of an interconnect between the data bus 19 on the module substrate and the data input/output pad 13, is connected to a fixed potential 20 to turn on the terminal resistance. COPYRIGHT: (C)2010,JPO&INPIT |
