发明名称 MANUFACTURE OF SEMICONDUCTOR ELEMENT
摘要 <p>PURPOSE:To improve the mass productivity by a method wherein, after forming elements on a wafer surface, element chip isolating grooves are formed on the surface of wafer and after bonding a holding body, the rear surface of the wafer is ground down to isolate the element chips and then heat sinks are formed by plating process. CONSTITUTION:n<-> channel layers are formed of the surface 12 of a semi- insulating GaAs substrate wafer 11 so as to form high output FETs 13. Next, chip isolating grooves 21 are formed between mutual FETs 13 on the surface 12; the surface 12 side is bonded onto a holding body 14 using a bonding agent 15; and then the wafer 11 is ground down from the rear surface until the isolating grooves 21 are exposed. Thus, the FETs 13 are mutually isolated by the isolating grooves 21 and successively heat sinks 16 are formed on the rear surface of the wafer 11 by plating process. Through these procedures, the heat sinks of high output element can be formed while chips can be isolated by simple processes thereby enabling the mass productivity and the yield to be improved.</p>
申请公布号 JPH0387027(A) 申请公布日期 1991.04.11
申请号 JP19890224084 申请日期 1989.08.30
申请人 NEC CORP 发明人 OHATA KEIICHI
分类号 H01L23/36;H01L21/301;H01L21/304;H01L21/78 主分类号 H01L23/36
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