发明名称
摘要 A phase-locked loop (PLL) circuit having a phase build-out function, and a phase control method of the PLL circuit. In the circuit and method a phase build-out detector monitors the input phase of a PLL device and detects a transient-wander component and a cycle-wander component at the same time. When only the transient-wander component is automatically detected, a phase build-out actuator resets a phase detector, a digital amplifier and a digital filter to restructure an output phase to match the input phase before change. As to the cycle-wander component detected at the same time, no phase restructuring is carried out.
申请公布号 JP4382591(B2) 申请公布日期 2009.12.16
申请号 JP20040189581 申请日期 2004.06.28
申请人 发明人
分类号 H03L7/095;G01R25/00;G01R25/04;H03L7/085;H03L7/093 主分类号 H03L7/095
代理机构 代理人
主权项
地址