发明名称 Stressed SOI FET having tensile and compressive device regions
摘要 A method is provided for fabricating a field effect transistor ("FET") having a channel region in a semiconductor-on-insulator ("SOI") layer of an SOI substrate. Desirably, in such method, a sacrificial stressed layer is formed to overlie a first portion of an active semiconductor region but not overlie second portion of the active semiconductor region which shares a common boundary with the first portion. After forming trenches in the SOI layer, the SOI substrate is heated with the stressed layer thereon sufficiently to cause the stressed layer to relax, thereby causing the stressed layer to apply a first stress to the first portion and to apply a second stress to the second portion. For example, when the first stress is tensile, the second stress is compressive, or the first stress can be compressive when the second stress is tensile. Desirably, the stressed layer is then removed to expose the first and second portions of the active semiconductor region. Desirably, the field effect transistor ("FET") is formed to include (i) a source region in the first portion, (ii) a drain region in the first portion, and (iii) a channel region in the second portion.
申请公布号 US7632724(B2) 申请公布日期 2009.12.15
申请号 US20070673716 申请日期 2007.02.12
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 CHIDAMBARRAO DURESETI;HENSON WILLIAM K.;LIU YAOCHENG
分类号 H01L21/00 主分类号 H01L21/00
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