| 摘要 |
A method and circuit are shown for decoding a Manchester encoded data input signal, wherein preamble found, data input, and recovered clock signals are received and a phase of the data input signal stored responsive thereto. A decision time signal alternates state responsive to the recovered clock signal. A switch pulse signal asserts when the decision time signal is active and the stored phase and current phase of the data signal have the same logic value, which is stored and cleared responsive to the recovered clock signal. A data output is decoded from a decision pair of phases responsive to the recovered clock, preamble found and decision time signals. The stored and current phases of the data input signal are selected to be the decision pair when neither the switch pulse signal or stored switch pulse signal are asserted and, otherwise, the stored phase and inverted stored phase are selected.
|
