发明名称 Multi-master, chained two-wire serial bus
摘要 Aspects of the disclosure embody a multi-master two-wire serial bus that comprises two or more chained two-wire serial busses. The chained two-wire serial busses include a host two-wire serial bus with a first master device and one or more slave devices. One or more chained two-wire serial busses are coupled to the host bus wherein one or more slave devices on the host two-wire serial bus operate as second master devices, which comprise a digital state machine including a two-wire serial slave component coupled to the master device and a two-wire serial master component coupled to the slave devices on the chained two-wire serial bus. The digital state machine emulates a slave device on the host two-wire serial bus and a master device on the chained two-wire serial bus.
申请公布号 US7634611(B2) 申请公布日期 2009.12.15
申请号 US20060378884 申请日期 2006.03.17
申请人 AGILENT TECHNOLOGIES, INC. 发明人 HIDAI TAKASHI;IINICKL SLAWOMIR K.;CURRAN-GRAY MARTIN
分类号 G06F13/36 主分类号 G06F13/36
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