发明名称 DELAY CIRCUIT AND TEST METHOD FOR DELAY CIRCUIT
摘要 A delay circuit includes: a delay unit configured to delay an input signal and output the delayed signal; a selecting unit configured to select a first signal at the time of a normal operation or a second signal at the time of a test operation, and provide the selected signal to the delay unit; an inverting unit configured to invert an output signal of the delay unit, and output the inverted signal as the second signal; and a counting unit configured to count an output waveform of the delay unit.
申请公布号 US2009302917(A1) 申请公布日期 2009.12.10
申请号 US20090541211 申请日期 2009.08.14
申请人 FUJITSU LIMITED 发明人 OKAMOTO KOJI
分类号 H03K5/13 主分类号 H03K5/13
代理机构 代理人
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