发明名称 ASYNCHRONOUS COUNTER BASED TIMING ERROR DETECTION
摘要 A method for estimating a timing difference between a first clock signal and a second clock signal is disclosed. The estimating method comprising: generating an edge signal by detecting an edge of the second clock signal by sampling the second clock signal using the first clock signal; generating a delayed edge signal by a further sampling of the second clock signal using the first clock signal; generating a first intermediate code by counting a number of clock edges of the first clock signal within a duration defined by the edge signal using an asynchronous counter; generating a second intermediate code to represent a timing difference between the second clock signal and the delayed edge signal using a time-to-digital converter; and generating an output code using a weighted sum of the first intermediate code and the second intermediate code.
申请公布号 US2009307518(A1) 申请公布日期 2009.12.10
申请号 US20090436765 申请日期 2009.05.06
申请人 REALTEK SEMICONDUCTOR CORP. 发明人 HSIEH HONG-YEAN
分类号 G06F1/06 主分类号 G06F1/06
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