发明名称 LAYOUT DESIGN METHOD AND COMPUTER-READABLE MEDIUM
摘要 A layout design method includes extracting a plurality of pairs of complementary signals from signal lines connected between a plurality of circuit blocks, for every signal lines connected between the same circuit blocks, and routing the pairs by twisting each pair.
申请公布号 US2009307647(A1) 申请公布日期 2009.12.10
申请号 US20090482348 申请日期 2009.06.10
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 MURAKAMI HIDEAKI;NAKANO MIKIO
分类号 G06F17/50 主分类号 G06F17/50
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