发明名称 MULTILAYER WIRING BOARD
摘要 PROBLEM TO BE SOLVED: To prevent a mark from being changed to a state where the function is spoiled even if an electrode is polished. SOLUTION: A multilayer wiring board comprises a board layer having wiring patterns formed by a plurality of wirings in multiple layers, an auxiliary layer comprising an auxiliary pattern provided on the upper surface of the board layer and an electrical insulating material which covers the auxiliary pattern, an electrode pattern formed by a plurality of electrodes provided on the upper surface of the auxiliary layer, and an alignment mark provided on the upper surface of the auxiliary layer. The auxiliary pattern is formed between the board layer and the mark and is not formed immediately below the mark. COPYRIGHT: (C)2010,JPO&INPIT
申请公布号 JP2009289942(A) 申请公布日期 2009.12.10
申请号 JP20080140482 申请日期 2008.05.29
申请人 MICRONICS JAPAN CO LTD 发明人 TAGUCHI TAKASHI;FUKAMI YOSHIYUKI
分类号 H05K3/46;H01L21/66;H01L23/12;H05K1/02 主分类号 H05K3/46
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