发明名称 Semiconductor memory device and manufacturing method thereof
摘要 A semiconductor device, in which both a reduction in a resistivity of a gate electrode and stabilization of transistor characteristics is achieved, and a manufacturing method thereof are disclosed. According to one aspect of the present invention, it is provided a semiconductor device comprising a semiconductor substrate, a plurality of gate electrodes each including an electric charge storage layer formed on the semiconductor substrate through a first insulator, first and second conductor layers, and a second insulator disposed between the electric charge storage layer and the first conductor layer, a barrier insulator provided between the gate electrodes and being in contact with side surfaces alone of the gate electrodes, and an interlayer insulator provided in contact with an upper surface of the second conductor layer.
申请公布号 US7629638(B2) 申请公布日期 2009.12.08
申请号 US20050319743 申请日期 2005.12.29
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 YAEGASHI TOSHITAKE
分类号 H01L29/788;H01L21/336 主分类号 H01L29/788
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