发明名称 Method for fabricating semiconductor package with build-up layers formed on chip
摘要 A semiconductor package with build-up layers formed on a chip and a fabrication method of the semiconductor package are provided. A chip with a plurality of conductive bumps formed on bond pads thereof is received within a cavity of a carrier, and a dielectric layer encapsulates the conductive bumps whose ends are exposed. A plurality of conductive traces are formed on the dielectric layer and electrically connected to the ends of the conductive bumps. A solder mask layer is applied over the conductive traces and formed with openings via which predetermined portions of the conductive traces are exposed and bonded to a plurality of solder balls. Thereby, positions of the bond pads are easily recognized and distinguished by the exposed ends of the conductive bumps, making the conductive traces capable of being well electrically connected through the conductive bumps to the bond pads to improve yield of the fabricated packages.
申请公布号 US7629199(B2) 申请公布日期 2009.12.08
申请号 US20070713362 申请日期 2007.03.01
申请人 SILICONWARE PRECISION INDUSTRIES CO., LTD. 发明人 HUANG CHIEN-PING;WANG YU-PO
分类号 H01L21/00;H01L21/48;H01L23/48;H01L23/485;H01L23/498;H01L23/538 主分类号 H01L21/00
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