发明名称 Multiplexing apparatus and demultiplexing apparatus
摘要 First and second input data sequences are packetized to produce packets having fixed first and second lengths, respectively. A flag and headers are attached to the packets for transmission. In a demultiplexing apparatus, when the header cannot be properly identified, subsequent demultiplexing steps are performed by estimating that the subsequent data is the first input data sequence, when the first length occurs before the next flag, and estimating that the subsequent data is the second input data sequence, when the second length occurs. When the flag cannot be properly identified, the flag is expected at the first length from the previous header when the previous header indicates the first input data sequence, and the flag is expected at the second length when the previous header indicates the second input data sequence.
申请公布号 US7630411(B2) 申请公布日期 2009.12.08
申请号 US20030467342 申请日期 2003.08.20
申请人 MITSUBISHI DENKI KABUSHIKI KAISHA 发明人 BABA MASAYUKI;KATO YOSHIAKI;MATSUDA YUKINARI
分类号 H04J3/04;H04L12/56;H04J3/14;H04J3/24;H04L1/00;H04L7/04;H04N7/52 主分类号 H04J3/04
代理机构 代理人
主权项
地址