| 摘要 |
<p>An integrated inductor arrangement comprises a first layer of a first doping type disposed on a second layer of a second doping type, a dielectric layer disposed on said first layer and a metallisation inductor structure disposed on said dielectric layer. A biasing means is provided to allow the reverse-biasing of said first layer with respect to said second layer, this reverse-biasing serving to increase the thickness of a depletion layer formed between the first and second layers. This increase in thickness reduces the overall parasitic capacitance seen by the inductor relative to the second layer and also reduces the magnitude of the currents induced in the first and second layers by the inductor structure. A further depletion layer may be provided in the first layer adjacent the dielectric layer, corresponding further biasing means being provided for the reverse-biasing of this layer with respect to the first layer. Normally, the first layer will be an epitaxial layer and the second layer will be a substrate. <IMAGE></p> |
