发明名称 PROCESS MANAGEMENT METHOD OF SEMICONDUCTOR DEVICE, AND DATA FOR PROCESS MANAGEMENT
摘要 PROBLEM TO BE SOLVED: To manage manufacturing dispersion of wiring included in a semiconductor device. SOLUTION: This process management method for managing manufacturing dispersion of wiring included in a semiconductor device is provided. The process management method includes steps of: (A) calculating wiring resistance and wiring capacitance in a condition where manufacturing dispersion of the width and thickness of the wiring is represented by points on a predetermined equal probability circle of a joint probability density function; and (B) specifying a variation range RNG of the wiring resistance and the wiring capacitance caused by the manufacturing dispersion based on the calculated wiring resistance and wiring capacitance. The variation range RNG is two-dimensionally predetermined in a coordinate system where the wiring resistance and the wiring capacitance are shown on a first axis and a second axis, respectively. COPYRIGHT: (C)2010,JPO&INPIT
申请公布号 JP2009283647(A) 申请公布日期 2009.12.03
申请号 JP20080133868 申请日期 2008.05.22
申请人 NEC ELECTRONICS CORP 发明人 ASAI YOSHIHIKO
分类号 H01L21/3205;G06F17/50;H01L21/768;H01L21/82;H01L23/52;H01L23/522 主分类号 H01L21/3205
代理机构 代理人
主权项
地址